A Register Communication Mechanism for Speculative Multithreading Chip Multiprocessors
نویسندگان
چکیده
Speculative multithreading on chip multiprocessors has drawn great attention as a technique for exploiting thread level parallelism from sequential applications. This paper proposes a register communication mechanism required to handle inter-thread register dependencies during speculative multithreading execution. The key issues in designing this mechanism are, ensuring the correctness of execution and tolerating communication latency important to the performance. This paper first describes a synchronization method for maintaining a consistent architectural view of the registers. It then presents a design of a ring-topology communication datapath for synchronizing register values. The communication mechanism we propose tolerates communication latency by eagerly moving register values closer to the consumer and by employing a simple producer-initiated communication protocol. It also avoids substantial increase in number of ports of register file and register rename map. Evaluation results show that, for a practical configuration the average performance achieved is within 6% margin compared to an ideal datapath.
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تاریخ انتشار 2003